Illustration drawn by RepoMasters from the repo’s ID and its language color. Credits

PrototypeCommon

rj45/rj32

A 16-bit RISC CPU with 32 instructions built with Digital for running on an FPGA.

Owner: rj45 (personal account)
Stars: Stars: 136
Forks: Forks: 20
Language: Verilog
License: MIT
Created: 2021
Topics: cpuverilogfpgavgadvisimulatorsimulationprocessor
Tier: Prototype (100 to 249 ★) What this tier means

Nearby in Verilog

All Verilog repos

efabless/caravel_mpw-oneStars: 138VerilogPrototype
NXP/i3c-slave-designStars: 137VerilogPrototype
mczerski/SD-card-controllerStars: 136VerilogPrototype
virtualagc/agc_simulationStars: 135VerilogPrototype
ekb0412/100DaysofRTLStars: 135VerilogPrototype
airin711/Verilog-cachesStars: 134VerilogPrototype