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WangXuan95/FPGA-FixedPoint

Verilog implementation of fixed-point numbers, supports custom bit width, arithmetic, converting to float, with single cycle & pipeline version. 一个Verilog定点数库,提供算术运算、与浮点数的互相转换,包含单周期和流水线两种实现。

Owner
WangXuan95 (personal account)
Stars
Stars: 241
Forks
Forks: 42
Language
Verilog
License
GPL-3.0
Created
2019
Topics
verilogrtlsystemverilogfixedpointarithmeticpipeline
Tier
Prototype (100 to 249 ★) What this tier means
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