Illustration drawn by RepoMasters from the repo’s ID and its language color. Credits
BetaRare

alexforencich/verilog-axis

Verilog AXI stream components for FPGA implementation

Owner
alexforencich (personal account)
Stars
Stars: 923
Forks
Forks: 279
Language
Python
License
MIT
Created
2014
Tier
Beta (700 to 1,999 ★) What this tier means
View on GitHub

More repos by alexforencich

All 13 repos by alexforencich

Nearby in Python

All Python repos