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fromgof/TridentVision

Implement yolov26m using a complete FPGA, without any C language code. Requires 160K LUTs and 386 DSP cores (based on Xilinx XC7K325T).

Owner
fromgof (personal account)
Stars
Stars: 311
Forks
Forks: 83
Language
Verilog
License
AGPL-3.0
Created
2026
Tier
Alpha (250 to 699 ★) What this tier means
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