PrototypeCommon
hrvach/fpg1
FPGA implementation of DEC PDP-1 computer (1959) in Verilog, with CRT, Teletype and Console.
- Owner
- hrvach (personal account)
- Stars
- Stars: 195
- Forks
- Forks: 18
- Language
- Verilog
- License
- MIT
- Created
- 2018
- Topics
- verilogfpgaretrocomputingpdp-1emulatormistermisterfpga
- Tier
- Prototype (100 to 249 ★) What this tier means
More repos by hrvach
All 4 repos by hrvach- hrvach/deskhopStars: 7,948CStable
- hrvach/esppleStars: 220CPrototype
- hrvach/uplatnicaStars: 113PythonPrototype
Nearby in Verilog
All Verilog repos- ben-marshall/uartStars: 198VerilogPrototype
- thedatabusdotio/fpga-ml-acceleratorStars: 198VerilogPrototype
- rejunity/tiny-asic-1_58bit-matrix-mulStars: 197VerilogPrototype
- ulixxe/usb_cdcStars: 194VerilogPrototype
- muditbhargava66/High-Frequency-Trading-FPGA-SystemStars: 194VerilogPrototype
- FPGADude/Digital-DesignStars: 193VerilogPrototype