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mhyousefi/MIPS-pipeline-processor

A pipelined implementation of the MIPS processor featuring hazard detection as well as forwarding

Owner
mhyousefi (personal account)
Stars
Stars: 165
Forks
Forks: 38
Language
Verilog
License
None
Created
2017
Topics
mips-processorverilogpipelineforwarding-unithazard-detectioncomputer-architecture
Tier
Prototype (100 to 249 ★) What this tier means
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