AlphaUncommon
openhwfoundation/cv32e40x
4 stage, in-order, compute RISC-V core based on the CV32E40P
- Owner
- openhwfoundation (organization)
- Stars
- Stars: 289
- Forks
- Forks: 76
- Language
- SystemVerilog
- License
- None
- Created
- 2021
- Tier
- Alpha (250 to 699 ★) What this tier means
More repos by openhwfoundation
All 13 repos by openhwfoundation- openhwfoundation/cva6Stars: 3,185AssemblyRC
- openhwfoundation/cv32e40pStars: 1,319SystemVerilogBeta
- openhwfoundation/core-v-verifStars: 737AssemblyBeta
- openhwfoundation/cvwStars: 659SystemVerilogAlpha
- openhwfoundation/cvfpuStars: 648SystemVerilogAlpha
- openhwfoundation/core-v-coresStars: 380Alpha
Nearby in SystemVerilog
All SystemVerilog repos- veripool/verilog-modeStars: 293SystemVerilogAlpha
- tymonx/logicStars: 292SystemVerilogAlpha
- harishsg993010/tiny-NPUStars: 291SystemVerilogAlpha
- chipsalliance/Cores-VeeR-EH2Stars: 283SystemVerilogAlpha
- intel/fpga-npuStars: 267SystemVerilogAlpha
- mathis-s/SoomRVStars: 258SystemVerilogAlpha