BetaRare
syntacore/scr1
SCR1 is a high-quality open-source RISC-V MCU core in Verilog
- Owner
- syntacore (organization)
- Stars
- Stars: 1,013
- Forks
- Forks: 367
- Language
- SystemVerilog
- License
- None
- Created
- 2017
- Topics
- riscvrisc-vrtlverilogrv32irv32erv32imcrv32emcipcore
- Tier
- Beta (700 to 1,999 ★) What this tier means
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