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chipsalliance/UHDM

Universal Hardware Data Model. A complete modeling of the IEEE SystemVerilog Object Model with VPI Interface, Elaborator, Serialization, Visitor and Listener. Used as a compiled interchange format in between SystemVerilog tools. Compiles on Linux gcc, Windows msys2-gcc & msvc, OsX

Owner
chipsalliance (organization)
Stars
Stars: 269
Forks
Forks: 49
Language
C++
License
Apache-2.0
Created
2019
Topics
vpi-apivpi-interfacesystemveriloglistenerserializationieee-standard
Tier
Alpha (250 to 699 ★) What this tier means
View on GitHub

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