Verilog GitHub repos, page 2
427 Verilog repos in the catalog, most starred first.
- WangXuan95/FPGA-FOCStars: 994VerilogBeta
- ultraembedded/coresStars: 940VerilogBeta
- WangXuan95/FPGA-USB-DeviceStars: 934VerilogBeta
- open-sdr/openwifi-hwStars: 916VerilogBeta
- FeSens/openTPUStars: 898VerilogBeta
- lvyufeng/step_into_mipsStars: 886VerilogBeta
- KastnerRG/riffaStars: 884VerilogBeta
- Obijuan/open-fpga-verilog-tutorialStars: 871VerilogBeta
- xiaop1/Verilog-PracticeStars: 818VerilogBeta
- rejunity/z80-open-siliconStars: 814VerilogBeta
- ekknod/pcileech-wifiStars: 793VerilogBeta
- The-OpenROAD-Project/OpenROAD-flow-scriptsStars: 787VerilogBeta
- Luthiraa/TALOS-V2Stars: 785VerilogBeta
- dawsonjon/fpuStars: 763VerilogBeta
- alexforencich/verilog-i2cStars: 731VerilogBeta
- antonblanchard/microwattStars: 729VerilogBeta
- OpenTimer/OpenTimerStars: 722VerilogBeta
- ZipCPU/wb2axipStars: 713VerilogBeta
- jmahler/mips-cpuStars: 660VerilogAlpha
- fguzman82/gateGPTStars: 656VerilogAlpha
- ultraembedded/core_ddr3_controllerStars: 645VerilogAlpha
- dtysky/FPGA-Imaging-LibraryStars: 644VerilogAlpha
- The-OpenROAD-Project/OpenSTAStars: 638VerilogAlpha
- SymbioticEDA/riscv-formalStars: 634VerilogAlpha
- seldridge/verilogStars: 632VerilogAlpha
- danielholanda/LeFlowStars: 630VerilogAlpha
- omarelhedaby/CNN-FPGAStars: 614VerilogAlpha
- QShen3/CNN-FPGAStars: 595VerilogAlpha
- openrisc/mor1kxStars: 593VerilogAlpha
- sheldonucr/ucr-eecs168-labStars: 592VerilogAlpha