Verilog GitHub repos, page 11
427 Verilog repos in the catalog, most starred first.
- mattvenn/basic-ecp5-pcbStars: 144VerilogPrototype
- racerxdl/riskowStars: 144VerilogPrototype
- MoonshotAI/nano-kpuStars: 144VerilogPrototype
- abdelazeem201/Cadence-RTL-to-GDSII-FlowStars: 141VerilogPrototype
- Azalea8/riscv_cpuStars: 141VerilogPrototype
- RongyeL/EasyAXIStars: 141VerilogPrototype
- MiSTer-devel/Gameboy_MiSTerStars: 140VerilogPrototype
- WangXuan95/FPGA-SDfakeStars: 140VerilogPrototype
- HDLForBeginners/ExamplesStars: 140VerilogPrototype
- russdill/bch_verilogStars: 139VerilogPrototype
- AngeloJacobo/RISC-VStars: 139VerilogPrototype
- open-fpga/core-templateStars: 139VerilogPrototype
- efabless/caravel_mpw-oneStars: 138VerilogPrototype
- NXP/i3c-slave-designStars: 137VerilogPrototype
- mczerski/SD-card-controllerStars: 136VerilogPrototype
- rj45/rj32Stars: 136VerilogPrototype
- virtualagc/agc_simulationStars: 135VerilogPrototype
- ekb0412/100DaysofRTLStars: 135VerilogPrototype
- airin711/Verilog-cachesStars: 134VerilogPrototype
- Daniel-GGB/My-Digital-IC-LibraryStars: 134VerilogPrototype
- AugustinJose1221/FPGA-BuildStars: 134VerilogPrototype
- robinhedwards/UltimateCartStars: 133VerilogPrototype
- ZipCPU/openartyStars: 133VerilogPrototype
- exeex/edge-coresStars: 133VerilogPrototype
- MiSTer-devel/Genesis_MiSTerStars: 132VerilogPrototype
- circuitgraph/circuitgraphStars: 132VerilogPrototype
- phoeniX-Digital-Design/phoeniXStars: 132VerilogPrototype
- mole99/gf180mcu-fabulous-fpgaStars: 132VerilogPrototype
- jotego/jt12Stars: 131VerilogPrototype
- Trinkle23897/mips32-cpuStars: 131VerilogPrototype