Verilog GitHub repos, page 6
427 Verilog repos in the catalog, most starred first.
- cliffordwolf/SimpleVOutStars: 259VerilogAlpha
- RV-BOSC/OpenNoCStars: 258VerilogAlpha
- Mazamars312/Analogue_Pocket_NeogeoStars: 257VerilogAlpha
- mflowgen/freepdk-45nmStars: 256VerilogAlpha
- The-OpenROAD-Project/RePlAceStars: 255VerilogAlpha
- lauchinyuan/FPGA_QPSK-modemStars: 253VerilogAlpha
- AniketBadhan/Convolutional-Neural-NetworkStars: 249VerilogPrototype
- GuoningHuang/FPGA-CNN-accelerator-based-on-systolic-arrayStars: 248VerilogPrototype
- avakar/usbcorevStars: 244VerilogPrototype
- efabless/caravel_user_projectStars: 244VerilogPrototype
- hkust-zhiyao/RTLLMStars: 243VerilogPrototype
- soDLA-publishment/soDLAStars: 241VerilogPrototype
- ChFrenkel/ODINStars: 241VerilogPrototype
- WangXuan95/FPGA-FixedPointStars: 241VerilogPrototype
- chipsalliance/synligStars: 237VerilogPrototype
- snbk001/Verilog-Design-ExamplesStars: 235VerilogPrototype
- nandland/spi-slaveStars: 234VerilogPrototype
- nonarkitten/amiga_replacement_projectStars: 234VerilogPrototype
- furrtek/SiliconREStars: 231VerilogPrototype
- gsmecher/minimaxStars: 231VerilogPrototype
- cameronshinn/tiny-tpuStars: 230VerilogPrototype
- Practical-UVM-Step-By-Step/Practical-UVM-Step-By-StepStars: 229VerilogPrototype
- WangXuan95/FPGA-DDR-SDRAMStars: 224VerilogPrototype
- emu-russia/breaksStars: 223VerilogPrototype
- YosysHQ/riscv-formalStars: 223VerilogPrototype
- adamgallas/llama-fpgaStars: 223VerilogPrototype
- wuxx/icesugar-proStars: 222VerilogPrototype
- ShawnHymel/introduction-to-fpgaStars: 219VerilogPrototype
- WalkerLau/DetectHumanFacesStars: 217VerilogPrototype
- eminfedar/fedar-f1-rv64imStars: 215VerilogPrototype